Memory, macro instruction counter and register

Bit number: 0 1 2 .. 5
Bits title: MWE IR IC
Instruction content:

Controller

Bit number: 6 .. 17 18 .. 21 22
Bits title: BAR Controller instruction CCEN
Instruction content:

Status and shift control unit

Bit number: 23 24 25 .. 30 31 .. 34 35 .. 36
Bits title: MSR mSR STATUS/TEST SHIFT CIN
Instruction content:

ALU and data inputs

37 .. 38 39 40 .. 43 44 45 .. 48 49 .. 51 52 .. 54 55 .. 57 58 .. 73 74
Y-MUX B-MUX RB ADDR A-MUX RA ADDR Sources Operation Outputs Constant K-MUX

Final instruction: 0b000000000000000000000000000000000000000000000000000000000000000000000000000